KDT consultation workshop on Silicon Photonics 

Goals

The Goals of this KDT workshop organized by AENEAS, EPoSS and Inside together with the KDT JU office are:

Topic

Silicon photonics[1] has reached a pivotal point en route to becoming a pervasive technology for a wide range of applications and markets, not limited to telecommunication and datacommunication. The manufacturing volume for silicon photonic chips is expected to grow significantly over the next years, making industrial exploitation viable. This change in scale would be due to an increase in potential new products that could use this versatile technology opening up new markets, including consumer markets. Indeed while applications for photonic integrated circuits[2] (PICs) are currently limited to mainly high speed transceivers (mostly made outside of Europe), in the future one will see applications in consumer health, automotive LIDARs, 5G transceivers, etc. Also the developed chips could play an important role in quantum computing technology, AI and other computing modalities.

The degree of success by which Europe will be part of the value chain will depend on the capability to build industrial capacity for silicon photonics and to add new functionalities or boost performance) beyond what mature silicon photonics manufacturing platforms can offer today. The wish list is long and therefore there is a need for agile wafer-scale technologies for the heterogeneous integration of chiplets or materials that leverage the current silicon photonics legacy. European RTOs have already developed state of the art pilot lines for this technology and are capable of low volume manufacturing. But industrial capacity is largely missing.

Bringing this technology to industrial scale is a challenge but there is urgency and it befits the objective of the KDT JU to reinforce the Union’s strategic autonomy in electronic components by supporting the fast transfer of technologies from the research to the industrial environment.

Approach

Besides receiving overview presentations from key actors, attendees will have the opportunity to give their input to a future road-mapping process for Silicon Photonics interactively at the end of the  workshop.

[1] Silicon photonics encompasses any integrated photonics approach on 200/300mm Si-wafers, including silicon-on-insulator, silicon nitride, germanium-on-silicon etc

[2] Photonic Integrated Circuits or PICs are based on silicon photonics platforms integrated with other photonic (e.g. laserdiodes, detectors,etc.) or non-photonic devices (e.g. CMOS circuits).

Programme 

Download the presentations by clicking on the links in the programme.


Time

Topic

Speaker

14.00 Welcome Colette Maloney, DG CNECT
14.05 Introduction by moderator Elisabeth Steimetz, VDI/VDE-IT
14.10 Portfolio analysis on the topic in HEU funding and overview over existing pilot-lines programme Werner Steinhögl, DG CNECT
14.25 Roadmap towards Silicon Phonics industrialisation Roel Baets, Chair of ePIXfab and Professor at Ghent University and Imec; Photonics 21 member
14.40 Introduction of KDT Call  “Industrial supply chain for silicon photonics” Yves Gigase, KDT-JU
14.55 Trends and Perspectives of Silicon Photonics for X-FAB, as specialty foundry in Europe Pascal Louis, X-FAB
15.10 Design and testing of Silicon PICs Inigo Artundo, VLC Photonics
15.25 Break
15.40 Discussion with all speakers / Q&A 
16.10 Wrap-up of workshop discussion Elisabeth Steimetz, Yves Gigase
16.20 Closing words  Werner Steinhögl, DG CNECT

Registration


Participation to the KDT consultation workshop on Silicon Photonics is free of charge. Registration is open to all members of the organisers communities and for invited actors in the field of Key Digital Technologies.


Organisers

 

aeneas programs

EPoSS-logo

Inside-logo